Villa, F. J., Acacio Sánchez, M., & García Carrasco, J. M. (2006). Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures. Journal of Computer Science and Technology, 6(01), p. 1–7. Retrieved from https://journal.info.unlp.edu.ar/JCST/article/view/823